Advancements in semiconductor fabrication technology enable the geometries of semiconductor devices to be progressively reduced so that more devices can fit on a single integrated circuit. As a result, core voltages of integrated circuits are being reduced to prevent damage to the small devices and to reduce overall power consumption. For example, power supplies are now being reduced from 3.3 volts to much lower voltages such as 2.5 volts, 1.8 volts and 1.5 volts. However, these low voltage devices are often interconnected at a board level to other devices that may operate at higher supply voltages. Also, these devices may be exposed to reflections and other events causing voltage spikes that can damage these small devices.
Semiconductor integrated circuits therefore often include some sort of protection against large input voltages. For example, an integrated circuit having a differential or pseudo-differential receiver can incorporate voltage-tolerant transistors within the receiver, which can handle larger input voltage swings and can provide a buffer to the smaller, more fragile core devices on the integrated circuit. However, voltage-tolerant transistors typically have lower performance and consume a larger silicon area and more power than a typical transistor.
In the design of high performance receivers, it is advantageous if the fastest, smallest transistors that are available in the technology can be used for the receiver. These transistors have the highest switching speeds and consume the least area and power. Often, however, the fastest transistors available in a technology are low-voltage transistors, which may not be able to directly tolerate certain signal levels. When this is the case, some sort of over-voltage protection network is required to prevent destructive voltages from reaching the low-voltage transistors in the receiver.
An example of an input overvoltage protection circuit includes a pass gate, which clamps the differential input signals to a desired voltage. For example, a receiver can be constructed from 1.5V±10% transistors and used in a two-volt signaling environment. The pass gate protection circuit can use an internally generated bias voltage to limit the differential input signal to a maximum of 1.5±10%.
However with low operating voltages, this type of a protection circuit can be difficult to implement. If the voltage to which the signal is limited is less than the zero-crossing point of the differential signals, the receiver may never trip. If the voltage limit is greater than the zero-crossing point but simply to close to the zero-cross point, then the input protection circuit can introduce a large timing distortion to the input signals, which reduces performance of the receiver. Improved overvoltage protection circuits are therefore desired for integrated circuit applications such as differential or pseudo-differential receivers. Improved bias generators are also desired for generating the bias voltages used by the protection circuit without consuming a relatively large area and power.